Reading Week 5 - Irrelevant Global Phase
Ch. 5.4 (cont.) Irrelevance of Phase
5.4.8: Global Phase and Its Irrelevance
Recall:
If we write
Rearranging:
Calculating
Applying
Thus a global phase of
Now instead consider the QC:
We begin with 0's at initialization:
Apply q[0]
and an q[1]
Apply q[1]
:
Here transferring the global phase occurring in a qubit into a relative phase of another qubit using a controlled gate is called phase kickback (or just kickback).
5.4.8.2: Sequence of Gates
We can combine sequences of gates to get a definition of the one, unified gate. For instance, for
These identities means we can make composite gates, which transform Pauli operators into other Pauli operators, forming the basis of universality.
5.4.8.3: Universality
In classical computing, we have a fundamental set of building blocks (gates) that compose all possible boolean functions we have. Choosing the two fundamental ones from OR and NOT are not good choices since they alone cannot make something like an XOR. Instead, using NAND and NOR are better as they are complete by themselves and can construct all other logic gates. Hence NAND and NORE are the universal logic gates in the classical world.
We can similarly define universal quantum gates, where any Quantum Computer can reduce these gates to a fundamental combination of ones from this unique set. The problem is that there's so many gates that it may be impossible to actually implement universality using a finite number of them, so we can use approximations. The Solovay-Kitaev Theorem says that approximations to any desired gate can be created using a fairly short sequence of gates from the generating set. In math terms, unitary
A set of
A common universal set of quantum gates are the Clifford Group and the
5.4.9: Circuit Optimization
5.4.9.1: Hardware Topology
From Reading Week 5 - Irrelevant Global Phase#5.4.8.2 Sequence of Gates we learned that a sequence of gates reduces to single-qubit operators, so there is some scope for circuit level optimizations. This is required to run some circuits on NISQ processors, due to physical constraints. They have a hardware topology with a limited set of basis gates and qubit connections. Arbitrary Quantum Circuits need to be converted to sequences of these
Consider constraints to just having access to CNOT and SWAP operations. The imbq_athens
has a topology such as:
Notice:
- The lines between the numbers are qubits and which gates are allowed (2 qubit gates only work on one edge)
- Even though physically we can't use qubit gates between unconnected qubits, we can make multi-qubit gates that do essentially what we want out of smaller "legal" operations.
The imbq_athens
has a list of basis gates for it:
[’id’, ’rz’, ’sx’, ’x’, ’cx’, ’reset’]
These are hardware gates because they are implemented at the hardware level. On the contrast, gates like
Running:
qc_basis = qc.decompose()
qc_basis.draw(output='mpl')
Gives us a difference between our original qc
and the one that can be made for the imbq_athens
:
Ch 4.1: Review of QC Vocab
Vocab Term | Definition |
---|---|
qubit | quantum data modality |
Universal Quantum Computer | Abstract machine used to model the effect of a QC |
Quantum Annealing | Procedure for finding a heuristic algorithm to find a global minimum from a finite set of candidates. |
Quantum Tunneling | The property that electrons can potentially leave a barrier even without enough energy, via their probability function. |
Quantum Speedup | The scenario where no classical computer can beat the one that the QC can (where the QC does it in polynomial time, but the classical computer can't) |
Quantum Advantage/Quantum Supremacy | The notion that some calculations are inherently better to do on a QC rather than a Classical Computer |
Decoherence | The process in which the qubit loses quantum information over time |
Quantum Volume | A way to measure and compare progress towards improved system-wide gate error rates for near-term quantum computation and error-correction experiments. It is a single-number metric that a concrete protocol can measure using a near-term quantum computer of modest size |
Ch 4.2: Classical Computers - A Recap
Digital bits are 0 or 1 exclusive. Qubits are a superposition of these two states.
Ch 4.3: Qubits and Usability
Many types of qubit devices are in the works:
- Nuclear Magnetic Resonance devices
- Valency centers in diamonds
- Photonics
- Trapped ion devices
- Superconducting transmons
- Quantum Dots
- Topological qubits
Digital computers are made on semiconductor material. QC's are made differently based on:
- Coherence time (longer)
- High gate fidelity
- Scalability
- Quantum error correction
- Qubit coupling
- Possible to be implemented commercially
Ch 4.4: Noisy Intermediate Scale Quantum Technology
Noisy Intermediate Scale Quantum Technology denotes the current quantum computing era. While some algorithms are able to run, they are sensitive to quantum errors. This limits their usability.
According to Prof. John Preskill:
“Noisy Intermediate-Scale Quantum (NISQ) technology will be available in the near future. Quantum computers with 50–100 qubits may be able to perform tasks which surpass the capabilities of today’s classical digital computers, but noise in quantum gates will limit the size of quantum circuits that can be executed reliably. NISQ devices will be useful tools for exploring many-body quantum physics, and may have other useful applications, but the 100-qubit quantum computer will not change the world right away—we should regard it as a significant step toward the more powerful quantum technologies of the future. Quantum technologists should continue to strive for more accurate quantum gates and, eventually, fully fault-tolerant quantum computing.”
Ch 4.5: Qubit Metrics
4.5.1: Spin or Energy Relaxation Time
This measures the characteristic time for the qubit to return to ground state from an exited state due to spin-environment coupling.
To measure:
- Put the state as
- Apply an
-transform and wait time till we measure
4.5.2: Dephasing Time
This is the time for the bloch vector to diffuse to the equator.
4.5.3: Decoherence Time
Assume a qubit at
To get to 4.7.b (total decoherence), is the
- Hann Echo
- Ramsay Experiment
which we cover below.
4.5.4: Hann Echo
- Prepare the qubit to the
state described prior via a Hadamard Gate - Wait half the time
- Apply
and wait for again - Apply
again and measure the probability of it in state
The time
4.5.5: Ramsay Experiment
- Prepare
like prior - Wait time
- Apply
again and measure the probability of being in state
4.5.6: Gate Time
The number of gate operations one can perform before the qubit completely decoheres and loses its usable lifetime. The gate time is:
for leading qubit modalities.