HW 2 - NMOS Inverters (Resistor & Nonlinear Loads), PMOS Review

Chapter 6.5-6.6.3 (NMOS Inverters)

6.1

Consider 100,000 gates, with 1W on the entire chip.

a

We have:

Pgate,on=1W100,000=10μW

So average power is:

Pavg=1210μW=5μW

b

We know:

I=PV=5μW2.5V=2μA

6.2

Consider 100,000,000 gates, with 100W to dissipate:

a

Same as HW 2 - NMOS Inverters (Resistor & Nonlinear Loads), PMOS Review#6.1:

Pon=100W100,000,000=1μW

b

So then:

Pavg=0.25Pon=0.25μW

Calculate the current:

Iavg=PavgV=0.25μW2.5V=0.1μA

c

Just multiply the total number of gates by our current:

100,000,000Iavg=10A

6.39

Consider the following, where VDD=2.5V:

Pasted image 20240122120532.png

We can use the table for values:

Kn=100μA/V2,Vtn=0.6V

a

We know:

Kn=Kn3=300μA/V2

We know that Vo=VL so then VI=VH=2.5V. We know for these types that:

Vo=VDS=VDDIDR=2.5IDR

Since VGSVtnVDS then we are in Triode so then:

ID=Kn(VOVVDS/2)VDS=Kn(2.5VtnVL/2)VL

So then plug into our original equation and get:

VL=2.5300μA/V2200kΩ(2.50.6VL/2)VL

Giving:

VL=2.560/V(1.9VL/2)VL=2.560(1.9VLVL2/2)=2.5114VL+30VL20=30VL2115VL+2.5

So then we can solve and get VL=3.811V,0.022V so clearly VL=0.022V. We can get power dissipation by finding ID:

ID=12.5μAP=IV=2.5V12.5μA=31.3μW

b

We repeat (a):

Kn=6Kn=600μA/V2VL=2.5600μA/V2400kΩ(2.50.6VL/2)VL

Thus:

VL=2.5240/V2(1.9VL/2)VL=2.5456VL+120VL2VL=0.00548V,3.803V

So clearly VL=5.48mV. Plug in as before:

ID=6.24μAP=IV=2.5V6.24μA=15.6μW

6.43

We as the noise margins for the circuit in HW 2 - NMOS Inverters (Resistor & Nonlinear Loads), PMOS Review#6.39.

a

VIL=1KnR+Vtn=1300μA/V2200kΩ+0.6V=0.6167V

And:

VOH=VDD12KnR=2.512300μA/V2200kΩ=2.4917V

And:

VIH=Vtn1KnR+1.63VDDKnR=0.916V

And:

VOL=2VDD3KnR=0.167V

So then:

NML=VILVOL=0.456V

and:

NMH=VOHVOL=1.5717V

b

We can repeat the same thing as (a), except that Kn=600μA/V2 and R=400kΩ are now changed using (b)'s values from before, giving:

VIL=

6.59

Pasted image 20240122130006.png

First, some calculations:

Kn,L=100μA/V20.5=500μA/V2,Kn,S=4Kn=400μA/V2

Since γ=0 then:

VH=VDDVtn=3.30.6=2.7V

Solving for VL, we know that the currents are the same. ML is forced saturation, while MS is in triode when VI=VH=2.7V (since we know VI>>VO):

IL,sat=IS,triKn,L/2(VGS,LVtn)2=Kn,SVL(VHVtnVL/2)25μA/V2(3.3VL0.6)2=400μA/V2VL(2.70.62.7/2)(2.7VL)2=16VL(2.1VL/2)VL25.4VL+7.29=33.6VL8VLVL231VL+7.29=0VL=0.237V

Thus we can find ID=152μA so then P=500μW.

6.60

We just need to find Vtn and do the previous problem again. Notice:

Vtn=VTO+γ(VBS+2ϕF2ϕF)=

Where VTO=0.6V, 2ϕF=0.6V:

Vtn=0.6+0.6(VH+0.60.6)

So:

VH=VDDVtn=3.30.60.6(VH+0.60.775)

Just plug in VH in a numeric solver to get:

VH=2.17V

Thus we do the same thing as prior, except with:

Vtn,sit=0.6+0.6(2VL+0.60.6)

Thus:

IDL=IDSKn,L/2(VGS,LVtn)2=Kn,SVL(VHVtnVL/2)

Plug into a numeric solver and we get:

VL=0.256V

Chapter 4.3 (PMOS Review)

4.48

We know Kp=μpCox=μpϵoxtox, so since μp=200cm2Vs, and ϵox=345fFcm1 for silicon oxide:

a) Kp=200cm2Vs345Fcm150nm=13.8μAV2
b) Kp=200cm2Vs345Fcm120nm=34.5μAV2
c) Kp=200cm2Vs345Fcm110nm=69μAV2
d) Kp=200cm2Vs345Fcm150nm=138μAV2

4.49

We are given:

Pasted image 20240123184522.png

We know that the pinchoff voltage is where the curve enters from triode into saturation. For say VGS=5VVSG=5V we see that it levels off starting at about VDS=4.5VVSD=4.5V, so then we have:

Vtp=(VSGVSD)=(54.5)=0.5V

Thus we can estimate the Kp value by plugging in a saturation value and using the corresponding drain current:

ISD=kp2(VSG|Vtp|)21250μA=kp2(3V0.5V)2Kp=400μA/V2

Since we know that Kp=40μA/V2 then W/L=KpKp=10/1.

Typically enchancement MOSFETs turn "off" at voltages near 0, while depletion MOSFETs turn "off" at extreme voltages (high-low). In this case, the MOSFET turns "off" at a voltage of 0, so it is enhancement.

4.50

Recall that:

ID,sat=kp2(VSG|Vtp|)2

At saturation ID stays relatively constant. We know what the values of Vtp and everything else are, so for VGS=3.5,4.5V we can see that:

ID,3.5V=400μA/V22(3.50.5)2=1800μA/V2

and

ID,4.5V=400μA/V22(4.50.5)2=3200μA/V2

Also, the voltage at which each becomes saturation is VDS=3V and VDS=4V respectively, which we use to plot the graph below:

4.51

We are given W/L=20 so then Kp=40μA/V220=800μA/V2. Since VBS=0V then Vtp=VTO=0.75V.

a

We are given VGS=1.1V and VDS=0.2V, so then notice that first VGS<Vtp so we are not in cutoff, but furthermore:

0.2V=|VDS||VGSVtp|=0.35V

So then we are in triode, so:

ID=800μA/V2(1.1(0.75)0.22)(0.2)=40μA

b

We are given VGS=1.3V and VDS=0.2V so then notice still VGS<Vtp but also:

0.2V=|VDS||VGSVtp|=0.55V

So we are still in triode:

ID=800μA/V2(1.3(0.75)0.22)(0.2)=72μA

c

We do the exact same process as before, except now since VBS=1V then:

Vtp=VTOγ(VBS+2ϕF2ϕF)=0.995V1.0V

Thus for (a) we have VGS<Vtp and |VDS||VGSVtp| so we are in saturation:

ID=400μA/V2(1.1(1.0))2=4μA

and for (b) we have VGS<Vtp and |VDS||VGSVtp| so we are in triode:

ID=800μA/V2(1.3(1.0)0.22)(0.2)=32μA

4.54

a

The on-resistance is given by:

Ron=1Kn(|VGSVtp|)

We are given that:

Kn=20040μA/V2=8000μA/V2

Furthermore, we know VGS=5V,Vtp=0.75V, so |VGSVtp|=4.25V, thus:

Ron=18000μA/V24.25V=29.41Ω

b

If we repeat where VGS=5V and Vtn=0.75V for an NMOS transistor, we get the same exact finding since VGSVtn=4.25V, except now Kn=100μA/V2200=20000μA/V2 so:

Ron=120000μA/V24.25V=11.76Ω

c

We require:

Ron=11.76Ω=140μA/V2W/L4.25VW/L=500/1

4.57

The maximum on resistance comes from when VDS=0.1V (as small as it can be) while we consider it's current ID=0.5A, so then:

Ron,max=[IDVGS]1|Qpt=0.1V0.5A=0.2Ω

So then:

Ron0.2Ω1Kn|VGSVtp|0.2ΩKp10.2Ω|10V(2V)|=0.625A/V2

is the maximum value for Kp.

4.59

Since VBS=4V then using our table values:

Vtp=VTOγ(VBS+2ϕF2ϕF)=1.435V

So since 1.5V=VGS<Vtp we are not in cutoff. Further, |VDS||VGSVtp| so we are in saturation. Using Kp=40μA/V225=1000μA/V2:

ID=500μA/V2(1.5V(1.435V))2=2.113μA

7.1

Note that:

Kn=μnCox=μneoxtox=500cm2/(Vs)3.98.8541014F/cm100108cm=172.7μAV2

And for Kp it's very similar:

Kp=μp3.9ϵoxtox=200cm2/(Vs)3.98.8541014F/cm1001010m100cm/m=69.1μAV2