Lecture 6 - Timers and Interrupts

This is probably the most important lecture in the class, so listen up!

Interrupts

Interrupts are HW based, and the first type of interrupt is the timer. The STM has 4 different places where you have to enable interrupts:

The ARM and NVIC are the bigger bottlenecks to interrupts. In the NVIC not only can you enable/disable interrupts, but you can set the priority of each interrupt. Things like Timer2 has some default priority, and when we enable interrupts and have a timing event, the ISR for Timer2 is run.

GPIOs go through the ExtI first, then to the NVIC, so you need to enable it in there too. We won't really be using ExtI for pin level interrupts, but you can if you want it (you get a mastery point if you do it).

So, to enable interrupts:

  1. In the Timer itself, there's control register DIER, and turn that on
  2. Turn on interrupts in the NVIC
  3. (Normally __enableIRQ() could be called, but by default ARM boots with them enabled)

Since ARM make the core, and STM makes the interfacing, there's really two documents to look at

  1. For the NVIC,look at 4.3 in the [[programmingModel.pdf#pages=210]]. Note that if you set a 1 in bit25 of ISER0, it'll turn on the 25th interrupt source. If I then set a 1 in bit 3 if ISER1, then it sets the interrupt 35, NOT interrupt flag 3.
  2. Go to the [[rm0351-stm32l47xxx-stm32l48xxx-stm32l49xxx-and-stm32l4axxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#pages=396]] to find what the interrupt sources even are (see where they come from). TIM2 has a priority of 35, position 28.

Getting the Name of the ISR

There is NO information to get the name of our ISRs; however, for our assignments we'll be provided a .h file that gives these names.

Okay this is a lot of information. Just start learning by doing. You'll struggle during A4-5, feel more confident by A7, and really confident by A8.

Timers

There's like a dozen timers on the STM32. We'll only use TIM2, as its very flexible for our purposes.

The TIM2 just has a counter, of 32 bits. It counts at the frequency of a clock. Our default clock is the MSI, which by default is 4MHz. We can change this in the code as we've done in Lecture 2 - (cont.) GPIO, Reset and Clock Control (RCC).

The PRE allows us to control the MSI clock we get and divide it into some lower clock. You can really use it to make the clock run really slowly.

Up Mode

There is another register ARR, the Auto-Reload Register. It's 32 bits. Let's look at the execution itself:

  1. We want to update the interrupt UI every 1KHz.
  2. Our MSI is set to 4MHz.
  3. Thus, we need a 1MHz clock sent to Counter
  4. Thus PRE needs to be 4.
  5. The ARR is set to 999.
  6. The counter counts at 1Mhz, so it'll hit 1000 to equate to the ARR at 1ms.
  7. Then the UI is set, which resets the Counter and also sets the PC to our ISR2.
  8. Repeat

Okay hopefully that clears things up, but let's look at the second half of the circuit (bottom half).

This does the exact same thing, except it doesn't reset the counter. This is better for things like intermediate timings. To reset the counter manually for these you can do:

TIM2->CR = 0;

A usage using both in PWM is shown below!!!