It's a trickier protocol for sure than SPI, but its very commonly used.

Overview

I2C is:

• Synchronous (there's a clock)
• Address-Data Packets (the address of the device to receive the data, then the data itself)
  • 7 bits of address + R/W bit, then the data itself (8 bits, one byte)
  • As such up to 128 devices on the bus (of course not recommended).
• All devices monitor the bus, actively looking for their address
• "Open-Drain Configuration": Two PU Resistors are needed on CLK and data line, which depends on the number of devices on the same bus.

SDA is the data bus, and SCL is the clock. PU resistors (usually 10K $\mathrm{\Omega }$) are needed from $V_{CC}$ to the bus itself.

Note that the logic here needs to check that SDA is pulled low and wait for the next clock. If two devices collide on trying to write to the bus (when SDA pulled low) then some systems exponentially wait (taking exponentially more time per consecutive collision) to write on the bus.

If you've heard of TWI (Two-Wire Interface), it's the same thing as I2C as this protocol is technically trademarked.

Notice the acknowledge bit, which the device we are sending to needs to set to low (since normally the wire is high) to say it got the data.

STM32 Registers

There's

• CR1, 2 for control registers
• OAR1, 2 as an output of its own address
• TIMINGR, TIMEOUTR for timing
• ISR, ICR for interrupt and interrupt clear
• ...

An aside on Serial vs. Parallel Protocols

Note that usually serial protocols are faster than parallel protocols. This is because